1. Field of the Invention
This invention relates generally to sample and hold circuits and more particularly to output amplifiers for such sample and hold circuits.
2. Description of the Prior Art
In one prior art type of sample and hold circuit, a first unity gain buffer amplifier is employed to transmit an input signal to a sample holding device such as, for instance, a capacitor, while a second unity gain amplifier is used to transmit the signal from the holding device to the output. The first amplifier is separated from the capacitor by a switch which is closed by an externally originated control signal during sampling periods allowing the input signal to charge the capacitor to the sample voltage level, and opened by the control signal during other periods decoupling the capacitor from the first amplifier and enabling it to hold the sample voltage level until the next sample is obtained. In order for the second amplifier to accurately transmit the sample voltage level to the output during relatively long intervals, it is necessary that it possess a very low input bias current so that it does not cause significant loading or loss of charge of the sample capacitor during the hold interval. On the other hand, it is necessary that the second amplifier be capable of responding at a relatively fast rate during the sample interval so that a given sample may be acquired as quickly as possible. The ability of an amplifier to respond quickly to large signal differentials is normally measured by its slew rate. Thus, ideal qualities for the output amplifier of a conventional prior art sample and hold circuit are (1) a low input bias current, (2) a high slew rate. A third quality which is important in special types of sample and hold circuits is the small signal transient response margin, or phase margin. This quality is especially important in sample and hold circuit arrangements which employ minor loop feedback to enhance the charging rate of the sample capacitor. In this case, as with any arrangement that uses a minor feedback loop in which the output amplifier is included, the gain phase characteristics of the output amplifier become a major factor in determining the stability and transient characteristics of the minor feedback loop. In general, large phase shifts in the output amplifier can give rise to an unstable loop which results in either oscillations or long settling times, while the minor loop is active. The problem associated with the design of an output amplifier suitable for use in a sample and hold circuit is that the requirements are conflicting. The requirement for low input bias current is conflicting with the requirement for high slew rate and with good transient performance. In prior art the problem has been approached by compromising the tradeoffs between high DC impedance and transient performance.
It would thus be a great advantage to the art to provide an amplifier exhibiting both a low input bias current and a high slew rate with good transient performance.